发明名称 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
摘要 An object is to obtain a semiconductor device manufacturing method capable of forming shallow extension regions in insulated-gate transistors. A side wall material containing about 1 to 20% of phosphorus, such as PSG is deposited on the sides of an opening to a film thickness of tens of nanometers to about 100 nm and etched back to form phosphorus-containing side walls (15a) and (15b) respectively adjacent to boron-containing side walls (10a) and (10b). An interlayer insulating film (48) of silicon nitride etc. is then formed on the silicon nitride film (14). A thermal process performed during formation of the interlaver insulating film (48) forms N-type extension regions (18a) and (18b) in the NMOS region (41) through a diffusion where phosphorus contained in the phosphorus-containing side walls (15a) and (15b) serves as the diffusion source and P-type extension regions (19a) and (19b) in the PMOS region (42) through a diffusion where boron contained in the boron-containing side walls (10a) and (10b) serves as the diffusion source.
申请公布号 US2002024095(A1) 申请公布日期 2002.02.28
申请号 US20010978540 申请日期 2001.10.18
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 SHIOZAWA KATSUOMI;UENO SYUICHI;ITOH YASUYOSHI
分类号 H01L29/43;H01L21/336;H01L21/8238;H01L27/092;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L27/12 主分类号 H01L29/43
代理机构 代理人
主权项
地址