| 摘要 |
PROBLEM TO BE SOLVED: To accelerate the instruction processing (executing) speed of a processor in a computer system which is equipped with a scalar processor and a vector processor. SOLUTION: A flash-processing circuit 12 operates flash processing caused by the execution of a VST instruction. A boundary check circuit 14 checks whether the access address of an LD instruction following the VST instruction is present in the boundary area of the VST instruction. At issuing of an LD instruction following the VST instruction, a decision circuit 15 decides that 'the following LD instruction is turned into a cache HIT, and the access address is present in the boundary area of the VST instruction', based on the judged result of the boundary check from the boundary check circuit 14 as for the VST instruction and the decision result of cache HIT/MISS decision from a cache block 13, and controls the change of the cache HIT to cache MISS.
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