发明名称 Polishing pad cluster for polishing a semiconductor wafer
摘要 A polishing pad cluster (10) for polishing a semiconductor wafer (W) having multiple integrated circuit dies (1) includes a pad support (12) and multiple polishing pads (22). Each pad (22) has a polishing area substantially smaller than the wafer but not substantially smaller than an individual one of the integrated circuit dies. Each polishing pad (22) is mounted to a respective polishing pad mount (14), which is in turn supported by the support (12). Each mount (14) includes a respective joint (24) having at least two degrees of freedom to allow the associated polishing pad (28) to articulate with respect to the support (12) to conform to the wafer. Each mount (14) is substantially rigid in a direction perpendicular to the pad (22) toward the pad support (12), and in some cases the adjacent mounts (14) are completely isolated from one another. A magnet is used to bias the polishing pad (22) against the wafer. <IMAGE>
申请公布号 EP0919330(B1) 申请公布日期 2002.02.27
申请号 EP19990200214 申请日期 1995.10.11
申请人 LAM RESEARCH CORPORATION 发明人 TALIEH, HOMAYOUN;WELDON, DAVID EDWIN
分类号 B24D99/00;B24B21/00;B24B37/26;H01L21/304;(IPC1-7):B24B37/04 主分类号 B24D99/00
代理机构 代理人
主权项
地址