| 摘要 |
Method of fabrication of a no-field transistor with no extra process costs, providing for defining an active area for the transistor surrounded by a thick field oxide layer, insulatively placing a polysilicon gate electrode across the active area to define source/drain regions of the no-field transistor, providing an implant protection mask over a boundary between at least one of the source/drain regions and the field oxide layer, selectively implanting in said source/drain regions a relatively heavy dose of dopants to form relatively heavily doped source/drain regions and to simultaneously dope the polysilicon gate electrode, the polysilicon gate electrode formed with lateral wings extending towards the at least one source/drain region, and the implant protection mask extending over the lateral wings but not over the polysilicon gate.
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