| 发明名称 |
Multilevel circuit implementation for a tristate bus |
| 摘要 |
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to drive a first bus in response to a first control signal. The second circuit may be configured to control a voltage of the first bus in response to the first control signal.
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| 申请公布号 |
US6351146(B1) |
申请公布日期 |
2002.02.26 |
| 申请号 |
US20000541320 |
申请日期 |
2000.04.01 |
| 申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
IGHANI RAMIN;NAYAK ANUP |
| 分类号 |
H03K19/017;H03K19/094;(IPC1-7):H03K19/00 |
主分类号 |
H03K19/017 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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