发明名称 |
Semiconductor device with stable and appropriate data output timing |
摘要 |
A semiconductor device includes a timing-stabilization circuit which adjusts a phase of the synchronization clock signal. The semiconductor device further includes a control circuit which suspends the adjustment of the phase of the synchronization clock by the timing-stabilization circuit during a time period when the data is output from an output circuit.
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申请公布号 |
US6351166(B2) |
申请公布日期 |
2002.02.26 |
申请号 |
US19980109897 |
申请日期 |
1998.07.02 |
申请人 |
FUJITSU LIMITED |
发明人 |
HASHIMOTO YUKINORI |
分类号 |
G11C11/407;G06F1/10;G11C7/22;H03L7/00;H03L7/081;(IPC1-7):H03K5/14;H03K11/20 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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