| 摘要 |
PURPOSE: To rapidly execute an overall arithmetic operation of a deblocking filter specified by an MPEG-4 in a small number of cycles. CONSTITUTION: A deblocking filter arithmetic device comprises D-mode arithmetic circuits 1 to 16 of the deblocking filter specified by the MPEG-4, T-mode arithmetic circuits 17 to 23, arithmetic mode deciding circuits 24 to 27 each for deciding which of arithmetic processes of the D-mode arithmetic circuit and the T-mode arithmetic circuit is conducted, and a selector 28 for switching an output of the D-mode arithmetic circuit and an output of the T-mode arithmetic circuit in response to a result of the deciding circuit. Further, prior to the arithmetic processes of the D-mode arithmetic circuit and the T-mode arithmetic circuit, an arithmetic process of an arithmetic mode deciding circuit is conducted, and a fixed value is input to a not adaptive arithmetic circuit instead of an input pixel value to thereby reduce its power consumption. |
