发明名称 FREQUENCY AND PHASE LOCKED LOOP(FPLL) APPROPRIATE FOR TRANSMISSION METHOD ACCOMPANYING CARRIER SIGNAL
摘要 PURPOSE: A frequency and phase locked loop(FPLL) appropriate for a transmission method accompanying a carrier signal is provided to integrate the FPLL circuit and to provide an output of a Q signal required in compensating a distortion in a relay. CONSTITUTION: A mixer mixes a local signal generated in a voltage controlled oscillator(103) and a signal of a middle frequency band and a pilot signal, that is, a carrier signal. The voltage controlled oscillator generates the local signal. An I-Q demodulator(100) comprises an I signal mixer(101) and a Q signal mixer(102) and the voltage controlled oscillator. The first and the second low pass filter(104,105) are constituted to remove a sum part of the mixed part of a signal generated through the I signal mixer and the Q signal mixer and the local signal from the voltage controlled oscillator. An automatic frequency control filter(106) changes a phase of a signal from the first low pass filter according to the amplitude of a bit frequency. A 90 degree phase converter(107) inverts a phase of a signal from the second low pass filter by 90 degree. An I signal hard limiter(108) and a Q signal hard limiter(109) output a square waveform. A phase comparator(110) detects a phase difference of two input signal having the same frequency. A charge pump(111) converts a digital signal generated due to the phase difference into an analog signal, and accelerates a locking time by amplifying a current being output from the phase comparator. An automatic phase control filter(112) controls a phase of a signal being output through the charge pump automatically.
申请公布号 KR20020014324(A) 申请公布日期 2002.02.25
申请号 KR20000047540 申请日期 2000.08.17
申请人 LG ELECTRONICS INC. 发明人 JUNG, CHANG SEOP
分类号 H03L7/093;(IPC1-7):H03L7/093 主分类号 H03L7/093
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