发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a stacked semiconductor module having high connection reliability. SOLUTION: A via hole 14 reaching a copper foil 13 is made through the insulating basic material 12 of a single side copper clad multilayer plate 11 which is to be a printed board 10. A plated conductor 15 is formed in the via hole 14 to project above the surface and the projecting part is pressed to form a land 16 connectable to the conductive bump 25 of an interlayer member 20. A connection land 19 is also formed on the surface side of a copper foil 63 by etching it. Since connection lands 16, 19 having a wide area are formed on the opposite sides of the printed board 10, electrical connection is ensured regardless of some positional shift at the time of stacking the interlayer member 20.
申请公布号 JP2002057276(A) 申请公布日期 2002.02.22
申请号 JP20000243060 申请日期 2000.08.10
申请人 IBIDEN CO LTD 发明人 KARIYA TAKASHI
分类号 H01L23/12;H01L25/065;H01L25/07;H01L25/18;(IPC1-7):H01L25/065 主分类号 H01L23/12
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