| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory in which load by boosting can be reduced when word line drive voltage is supplied to a word line. SOLUTION: A decoding circuit 50 has pull-up and pull-down transistors M2, M3, M6, M8, M9 coupled to a global word line GWL coupled to word lines by the prescribed coupling means, turns on the pull-down transistors M3, M6, M9 before high voltage conforming to an operation mode is supplied to selected one global word line GWL out of the global word lines, and gates of the pull-up transistors M2, M5, M8 are charged preliminarily by a spare charging circuit CPCO. When word line drive voltage is supplied to the global word line GWL, a self-boosting system is utilized.</p> |
