发明名称 INTEGRATED SHALLOW TRENCH ISOLATION APPROACH
摘要 A method for processing a silicon substrate disposed in a substrate process chamber includes transferring the substrate into the substrate process chamber. The substrate having a hard mask formed thereon and a patterned photoresist overlying the hard mask to expose portions of the hard mask. The chamber being the type having a source power system and a bias power system. The method further includes etching the exposed portions of the hard mask to expose portions of the silicon substrate underlying the hard mask. Tehereafter, the patterned photoresist is exposed to a fist plasma formed from a first process gas to remove the photoresist from the hard mask. Thereafter, the exposed silicon substrate is etched by exposing the substrate to a second plasma formed from a second process by applying RF energy from the source power system and biasing the plasma toward the substrate. The substrate is transferred out of the substrate processing chamber.
申请公布号 WO0215249(A2) 申请公布日期 2002.02.21
申请号 WO2001US25391 申请日期 2001.08.13
申请人 APPLIED MATERIALS, INC. 发明人 LIU, WEI;WILLIAMS, SCOTT;YUEN, STEPHEN;MUI, DAVID
分类号 G03F7/42;H01L21/027;H01L21/3065;H01L21/308;H01L21/76 主分类号 G03F7/42
代理机构 代理人
主权项
地址