发明名称 ESD PROTECTION CIRCUIT IMMUNE TO LATCH-UP DURING CIRCUIT OPERATION
摘要 An ESD protection circuit of the present invention comprises a semiconductor controlled rectifier and at least one diode connected in series. The series-connected semiconductor controlled rectifier and diode are electrically coupled between a pair of circuit nodes. Even though the semiconductor controlled rectifier enters snapback during circuit operation the diode can be utilized to increase a holding voltage between the pair of circuit nodes. The required number of diodes is based upon the design consideration so that proper trigger voltage and holding voltage can be acquired. The semiconductor controlled rectifier can be a lateral semiconductor controlled rectifier, a low voltage triggering semiconductor controlled rectifier, or a floating-well semiconductor controlled rectifier.
申请公布号 US2002020880(A1) 申请公布日期 2002.02.21
申请号 US19990412829 申请日期 1999.10.05
申请人 YU TA-LEE 发明人 YU TA-LEE
分类号 H01L27/02;(IPC1-7):H01L23/62;H01L23/552 主分类号 H01L27/02
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