发明名称 |
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE OF MULTILAYERED INTERCONNECTION STRUCTURE INCLUDING ETCH STOP LAYER |
摘要 |
PURPOSE: A method for fabricating a semiconductor device of a multilayered interconnection structure including an etch stop layer is provided to sufficiently removing a native oxide layer without consuming an etch stop layer, by depositing a P-SiON layer and by performing an annealing process in a N2 atmosphere to activate the P-SiON layer. CONSTITUTION: The P-SiON layer is formed on a semiconductor substrate(100) wherein the upper surface of a conductive plug and an insulation layer are simultaneously exposed. The P-SiON layer is annealed and activated in a N2 atmosphere. An oxide layer is formed on the activated P-SiON layer(122a). The oxide layer is patterned by using the activated P-SiON layer as an etch stop layer to expose the upper surface of the conductive plug. An unnecessary native oxide layer on the conductive plug is eliminated by a wet-cleaning method. An interconnection layer electrically connected to the conductive plug is formed.
|
申请公布号 |
KR20020013017(A) |
申请公布日期 |
2002.02.20 |
申请号 |
KR20000046347 |
申请日期 |
2000.08.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
NAM, CHANG HYEON;SON, HONG SEONG |
分类号 |
H01L21/768;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|