Serial to parallel conversion by extracting even and odd numbered data pulses synchronously with leading and trailing edges of clock pulses respectively,申请号GB20010004437-传众专利搜索

首页产品黄页商标征信

会员服务注册登录

法人/股东/高管

发明名称	Serial to parallel conversion by extracting even and odd numbered data pulses synchronously with leading and trailing edges of clock pulses respectively
摘要
申请公布号	GB2365723(A)	申请公布日期	2002.02.20
申请号	GB20010004437	申请日期	2001.02.22
申请人	* NEC CORPORATION	发明人	TAKESHI * ANZAI
分类号	G06F13/38;G11C7/10;G11C7/22;H04L7/00;H04L29/10;(IPC1-7):G11C7/00	主分类号	G06F13/38
代理机构		代理人
主权项
地址

您可能感兴趣的专利

Space-time coding for zero-tail spread OFDM system in a wireless network

Method and arrangement for decoding a signal encoded by a tail-biting code

Delay-locked loop arrangement and method for operating a delay-locked loop circuit

Bidirectional delay circuit and integrated circuit including the same

Semiconductor device with clock-based signal input circuit

Synchronizing an inverter with an alternating voltage source

Multi-level half bridge with sequenced switch states

Non-isolated AC-to-DC converter with fast dep-FET turn on and turn off

Forward-based power conversion apparatus

Bidirectional DC/DC converter

Circuit for paralleled power supply module to implement automatic current-sharing in proportion

Rotor coil for armature of rotating machine and production method thereof

System, apparatus and method for uninterruptible power supply

Lithium battery auto-depassivation system and method

Systems and methods for protecting power conversion systems under open and/or short circuit conditions

Electronic circuit and low voltage arc flash system including an electromagnetic trigger

Method and apparatus for providing supercontinuum pulses

Docking station having connector preload and isolator system

Grounding apparatus for a safety grounded tree

Magnetic diagnostic probe connector system