发明名称 TIME PIECE SYNCHRONOUS CIRCUIT
摘要 PROBLEM TO BE SOLVED: To synchronize respective timepiece circuits 15 with each other with a simple structure irrelevant to connection/separation of some timepiece circuit 15, in a timepiece synchronous circuit 16 mutually synchronizing the time piece circuits 15 mounted for sampling data at prescribed times and controlling the load respectively and linking a plurality of monitor control devices 11, 12 and 13 together. SOLUTION: A pulse generation circuit 17 generates pulses to a transmission path 14 connecting the respective synchronous circuits 16 mutually at respective basic timings of clock signal first transition or last transition to be references of the timing and a phase control circuit 20 controls the phase of the clock signal of the timepiece circuits 15 according to the gain or delay between the pulse received by a receiver 19 and outputted from another timepiece synchronous circuit 16 and a pulse outputted from the own circuit. The master-slave relation is thus eliminated between the timepiece circuits 15, thus the clock circuits 15 connected to each other by a simple constitution can be synchronized.
申请公布号 JP2002055181(A) 申请公布日期 2002.02.20
申请号 JP20000241607 申请日期 2000.08.09
申请人 NISSIN ELECTRIC CO LTD 发明人 YAMADA YOJI
分类号 G04G7/00;G06F1/12;G06F1/14;G06F13/42;H04L7/00 主分类号 G04G7/00
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