发明名称 High performance mechanism to support O state horizontal cache-to-cache transfers
摘要 A multiprocessor data processing system includes an interconnect, a plurality of processing units coupled to the interconnect, and at least one system memory and a plurality of caches coupled to the plurality of processing units. A cache suitable for use in such a data processing system includes data storage containing multiple data granules and a number of state fields associated with the data granules. Each state field has a plurality of possible states including an OR state that indicates that an associated granule is consistent with corresponding data in the memory, that the associated data granule has unknown coherency with respect to other peer caches in the data processing system, and that the cache is responsible, among all of its peer caches that may store the associated data granule in a memory-consistent state with unknown coherency, for sourcing the data granule in response to a request.
申请公布号 US6349368(B1) 申请公布日期 2002.02.19
申请号 US19990339406 申请日期 1999.06.24
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARIMILLI RAVI KUMAR;ARIMILLI LAKSHMINARAYANA BABA;FIELDS, JR. JAMES STEPHEN;GHAI SANJEEV
分类号 G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/08
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