发明名称 Constant edge output buffer circuit and method
摘要 A buffer circuit and method provide substantially constant output signal edges to facilitate service as a bus driver with enhanced timing flexibility. The buffer circuit includes a NOR gate and a NAND gate for driving output pulldown and pullup transistors. The initiation of current flows through the NOR and NAND gates is controlled by an environmentally adaptive reference circuit. First and second transistors are provided respectively between the NAND gate and the pullup transistor, and between the NOR gate and the pulldown transistor, to produce enhanced sourcing and sinking currents. The enhanced sinking and sourcing currents are timely terminated by switching of the pulldown and pullup transistors to save energy.
申请公布号 US6348814(B1) 申请公布日期 2002.02.19
申请号 US20000799953 申请日期 2000.02.14
申请人 CADENCA DESIGN SYSTEMS, INC. 发明人 PETERSON LUVERNE
分类号 H03K19/003;H03K19/094;(IPC1-7):H03K19/02 主分类号 H03K19/003
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