发明名称 Solder interconnect techniques
摘要 A method and article of fabrication is described featuring a solder layer having a serpentine, interrupted, or interdigitated boundary. The non-planar design of the boundary layer increases the fatigue life of the solder joint by limiting the damage caused by micro-cracking. This irregularity of the solder boundary constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path along which the crack propagates.
申请公布号 US6347901(B1) 申请公布日期 2002.02.19
申请号 US19990430965 申请日期 1999.11.01
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PARK SEUNGBAE;SATHE SANJEEV;ZUBELEWICZ ALEKSANDER
分类号 B23K3/06;B23K35/02;B23K35/14;H01L21/48;H01L21/60;H01L23/485;H01L23/498;H05K1/11;H05K3/34;(IPC1-7):H01L21/60 主分类号 B23K3/06
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