发明名称 Digital variable-delay circuit having voltage-mixing interpolator and methods of testing input/output buffers using same
摘要 A variable-delay circuit on an integrated circuit is used to delay a periodic strobe signal. In normal operation, the strobe signal can be shifted 90 degrees to center it within a data bit cell. In test mode, it can also be shifted up to 270 degrees in N increments to measure the effective input latch setup and hold timings. The variable-delay circuit comprises a voltage-mixing interpolator circuit to produce phase delays in N increments. The variable-delay circuit can incorporate an existing delay locked loop. Also described are an electronic system, a data processing system, and various methods of performing on-chip testing and calibration.
申请公布号 US6348826(B1) 申请公布日期 2002.02.19
申请号 US20000605624 申请日期 2000.06.28
申请人 INTEL CORPORATION 发明人 MOONEY STEPHEN R.;HAYCOCK MATTHEW B.;MARTIN AARON K.;SPITZ JONATHAN N.;SANDHINTI MICHAEL S.
分类号 G01R31/30;G01R31/317;G01R31/3185;G01R31/319;H03K5/00;H03K5/13;H03L7/081;(IPC1-7):H03H11/16 主分类号 G01R31/30
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