| 摘要 |
PURPOSE: To provide a test method for a non-volatile semiconductor memory by which quantity of disturbance and margin of disturbance can be tested and evaluated surely and in a short time. CONSTITUTION: In a non-volatile semiconductor memory having a floating gate 2, plural memory cells 21 connected to one word line are programmed simultaneously. Voltage having magnitude increased gradually and of which the final pulse voltage being equal to voltage required for finishing programming the plural memory cells 21 to which program disturbance stress is applied or program disturbance stress pulse train being voltage in which voltage of fixed magnitude is subtracted from voltage required for finishing a program is applied to a control terminal 11 of a selected memory cell 21 after the memory cell is made an erasure state, and after finish of applying the program disturbance stress pulse train, in a memory cell to which program disturbance stress is applied simultaneously, a test of a non-volatile semiconductor memory is performed by measuring only a memory cell 21 in which threshold voltage is the lowest.
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