NON-VOLATILE SEMICONDUCTOR MEMORY HAVING TESTING FUNCTION

摘要

PROBLEM TO BE SOLVED: To provide a memory device in which the number of chips to be tested at once in one wafer can be maximized by minimizing the number of pins allotted to one chip. SOLUTION: This memory device is provided with an address counter (80) generating plural address signals in accordance with a signal inputted from the outside, an address selecting circuit (90) controlling a pat of an address signal, plural switches connected between a memory array (10) and a data input/output pin (DQK) and divided into the prescribed number of switch groups (GK), and a switch control circuit (100) generating a switch control signal controlling opening and closing of the switch groups (GK) in accordance with an external signal, a part of the data input/output pins (DQK) are used so as to correspond to the number of switch groups.