发明名称 |
MULTI-LAYERED INTEGRATED SEMICONDUCTOR DEVICE INCORPORATING ELECTRICALLY CONNECTED INTEGRATED CIRCUIT CHIPS AND MONITORING PADS |
摘要 |
A multi-layered integrated semiconductor device incorporates an upper and lower IC chips which are connected with each other via a first set of wiring pads of the upper IC chip to a second set of wiring pads of the lower IC chip. The device is provided with a multiplicity of pair-wise connected external monitoring terminals on the periphery of the upper IC chip, and a multiplicity of monitoring pads on the lower IC chip, in opposition to the pair-wise connected monitoring pads, so that pad-to-pad resistances between the pads of the upper and lower IC chips can be externally measured by directly connecting the monitoring pads to the external terminals.
|
申请公布号 |
US2002017707(A1) |
申请公布日期 |
2002.02.14 |
申请号 |
US20000520312 |
申请日期 |
2000.03.07 |
申请人 |
SUENAGA YOSHIAKI;KISHINO TATSUO |
发明人 |
SUENAGA YOSHIAKI;KISHINO TATSUO |
分类号 |
H01L23/52;G01R31/26;H01L23/495;H01L25/065;(IPC1-7):H01L23/02 |
主分类号 |
H01L23/52 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|