发明名称 Semiconductor memory device and method for the manufacture thereof
摘要 The wiring structure provided to the semiconductor memory device comprises a main wiring layer and barrier metal layer each established in the substrate and is connected to the lower electrode of a capacitive element. The main wiring layer and lower electrode are isolated from each other by a barrier metal layer acting as a material impermeable to oxygen; as a result, the main wiring layer is not easily oxidized.
申请公布号 US2002017723(A1) 申请公布日期 2002.02.14
申请号 US20010917621 申请日期 2001.07.31
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 IGARASHI YASUSHI
分类号 H01L23/52;H01L21/02;H01L21/285;H01L21/3205;H01L21/8242;H01L21/8246;H01L27/105;H01L27/108;(IPC1-7):H01L23/48 主分类号 H01L23/52
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