发明名称 |
Image processor |
摘要 |
An image processor has a controller unit connected to at least one of functional units such as an image reading unit, detects a source of input of image data according to a network I/F or a parallel bus I/F. An image-memory access control section transmits the image data input from each of the functional units to a memory group and also transmits the image data stored in the memory group to the functional unit. A system controller controls the overall apparatus and also controls the image-memory access control section according to the input source of the image data to determine an order of transmitting the image data to the memory group.
|
申请公布号 |
US2002018244(A1) |
申请公布日期 |
2002.02.14 |
申请号 |
US20000725569 |
申请日期 |
2000.11.30 |
申请人 |
NAMIZUKA YOSHIYUKI;MIYAZAKI HIDETO;MIYAZAKI SHINYA;OTEKI SUGITAKA;TAKAHASHI YUJI;TONE TAKEHARU;YOSHIZAWA FUMIO;FUKUDA HIROAKI;NOMIZU YASUYUKI;SATOH TAKAKO;ISHII RIE;KAWAMOTO HIROYUKI |
发明人 |
NAMIZUKA YOSHIYUKI;MIYAZAKI HIDETO;MIYAZAKI SHINYA;OTEKI SUGITAKA;TAKAHASHI YUJI;TONE TAKEHARU;YOSHIZAWA FUMIO;FUKUDA HIROAKI;NOMIZU YASUYUKI;SATOH TAKAKO;ISHII RIE;KAWAMOTO HIROYUKI |
分类号 |
H04N1/00;H04N1/21;H04N1/32;H04N1/40;(IPC1-7):H04N1/40 |
主分类号 |
H04N1/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|