发明名称 Phase lock circuit
摘要 A phase lock circuit comprising a phase frequency comparator having a first input for a reference signal and a second input for a feedback signal, as well as outputs for furnishing an up-signal or a down-signal to a control charge pump circuit, which control charge pump circuit is connected with the outputs of the phase frequency comparator and has an output which is connected via a loop filter with a voltage-controlled oscillator provided with tuning means, the output of the oscillator being connected via a frequency divider with the second input of the phase frequency comparator, while for furnishing a tuning voltage for the tuning means a voltage charge pump circuit is provided, which is combined with the control charge pump circuit to form a combined charge pump circuit connected with the output of the phase frequency comparator.
申请公布号 US2002017958(A1) 申请公布日期 2002.02.14
申请号 US20010874399 申请日期 2001.06.06
申请人 VAN ZEIJL PAULUS THOMAS MARIA 发明人 VAN ZEIJL PAULUS THOMAS MARIA
分类号 H03L7/089;H03L7/18;(IPC1-7):H03L7/00 主分类号 H03L7/089
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