METHOD AND APPARATUS FOR A DIGITAL CLOCK MULTIPLICATION CIRCUIT
摘要
A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable regions. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.
申请公布号
WO0213385(A1)
申请公布日期
2002.02.14
申请号
WO2000IB01164
申请日期
2000.08.04
申请人
THE NATIONAL UNIVERSITY OF SINGAPORE;LYE, KIN, MUN;JOE, JURIANTO