发明名称 |
Method and device for testing an integrated circuit, integrated circuit to be tested, and wafer with a large number of integrated circuits to be tested |
摘要 |
A method and a device for testing an integrated circuit are defined by the fact that the testing of the integrated circuit is begun by a self-test device contained in the integrated circuit before the integrated circuit is connected to an external testing device that reads out and/or evaluates the results of the self test. The integrated circuit and the wafer are constructed in such a way that this is readily possible with little outlay. An integrated circuit that includes the self-test device and a wafer including such integrated circuits is also disclosed.
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申请公布号 |
US2002019964(A1) |
申请公布日期 |
2002.02.14 |
申请号 |
US20010922479 |
申请日期 |
2001.08.03 |
申请人 |
ZETTLER THOMAS |
发明人 |
ZETTLER THOMAS |
分类号 |
G01R31/317;G01R31/3185;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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