| 摘要 |
<p>The multi-port cache memory of the present invention is formed by using, as constituents, one-port cell blocks (2,5) adapted for a large storage capacity, making it possible to easily provide a multi-port cache memory of a large storage capacity and reduced integration area, which has a large random access bandwidth, is capable of parallel access from a plurality of ports, and is adapted for use in advanced microprocessors having a small cache miss probability.</p> |
