发明名称 Programmable logic device input/output circuit configurable as reference voltage input circuit
摘要 A programmable input/output circuit for a programmable logic device input/output pin can be configured in a standard I/O mode, or in a reference voltage mode. The circuit includes a tristatable, but otherwise standard I/O buffer as well as a reference voltage clamp circuit. In reference voltage mode, the I/O circuit is tristated, and the reference voltage clamp circuit passes a reference voltage from the I/O pin to a reference voltage bus. In standard I/O mode, the I/O buffer is operational. The reference voltage clamp circuit isolates the I/O pin from the reference voltage bus and may include undervoltage and overvoltage protection to prevent disturbance of the reference voltage bus by an out-of-range I/O signal.
申请公布号 US6346827(B1) 申请公布日期 2002.02.12
申请号 US19990366937 申请日期 1999.08.04
申请人 ALTERA CORPORATION 发明人 YEUNG WAYNE;SUNG CHIAKANG;WONG MYRON W.;NGUYEN KHAI;WANG BONNIE I.;WANG XIAOBAO;HUANG JOSEPH;KIM IN WHAN
分类号 G11C5/06;G11C5/14;(IPC1-7):H01L25/00;H03K19/177 主分类号 G11C5/06
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