Internal offset-canceled phase locked loop-based deskew buffer

摘要

A phase lock loop-based deskew buffer circuit includes a fixed delay element to delay a feedback signal and to generate a first signal from the feedback signal. A delay locked loop (DLL) generates a second signal from a reference signal and compares a phase of the feedback signal with a phase of the reference signal. The DLL is capable of keeping a relative timing of the first and second signals constant while adjusting the feedback signal to be in phase with the reference signal. This results in loop stability and cancellation of internal offset.