发明名称 Multilayer wiring structure and semiconductor device having the same, and manufacturing method therefor
摘要 In a multilayer wiring structure, a plurality of wiring layers (9, 11, 13) are formed on an inorganic lowermost insulating film (2) formed on a silicon substrate (1), and organic interlayer insulating films (14, 15, 16, 17, 18) are interposed between the respective adjacent wiring layers. Via metal (8, 10, 12) are formed in the inorganic lowermost insulating film (2) and the organic interlayer insulating films (15, 17), and openings having the shape corresponding to an electrode pad are formed in the organic interlayer insulating films (14, 15, 16, 17, 18), and these openings are filled with metal material to form metal film patterns (3, 4, 6, 5, 7), whereby the electrode pad is constructed as the laminate body of the metal film patterns (3, 4, 6, 5, 7). Accordingly, even when organic material having a low dielectric constant is used for the interlayer insulating films, durability of an electrode portion to impacts in a bonding process is enhanced, and both of reduction in parasitic capacitance and enhancement in strength of the electrode portion can be achieved.
申请公布号 US6346471(B1) 申请公布日期 2002.02.12
申请号 US20000637255 申请日期 2000.08.11
申请人 NEC CORPORATION 发明人 OKUSHIMA MOTOTSUGU
分类号 H01L23/522;H01L21/3205;H01L21/60;H01L21/768;H01L23/485;H01L23/52;(IPC1-7):H01L21/476 主分类号 H01L23/522
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