发明名称 FERROELECTRIC MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a ferroelectric memory in which data can surely be protected even if process parameters are changed, the time for reliability evaluation test can be shortened, and the destruction of a device due to the test can be prevented. SOLUTION: Power source voltage VDD is detected by using a power source voltage detecting circuit 4 having a stable detection level, when the detected voltage RREFA is a set detection level VREFA or less, an external input terminal XEXTCE is deactivated by using an output signal of a differential amplifier circuit 3 and data is protected. Thereby, stable data protection can be performed.
申请公布号 JP2002042496(A) 申请公布日期 2002.02.08
申请号 JP20000224665 申请日期 2000.07.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MANO YOSHITAKA
分类号 G01R31/28;G01R31/3185;G11C11/22;G11C11/401;G11C14/00;G11C29/02;G11C29/06;G11C29/50;(IPC1-7):G11C29/00;G01R31/318 主分类号 G01R31/28
代理机构 代理人
主权项
地址