CLOCK AND DATA RECOVERY CIRCUIT IN DATA COMMUNICATION SYSTEM

摘要

PURPOSE: A clock and data recovery circuit in a data communication system is provided to accurately recover clocks by simultaneously detecting the phase and frequency changes of input data with a simple structure. CONSTITUTION: A phase frequency detector(11) detects the phase and frequency error between input data and clocks using a first recovered clock and a third clock with 90 deg. phase difference with the first clock, and generates a data lag signal and a data read signal in accordance with the result. A charge pump(13) increases/decreases charge amount in accordance with the difference between the data lag signal section and the data read signal section. A loop filter(15) removes noise components from the output of the charge pump. A voltage control oscillator(17) increases/decreases the periods of clocks recovered by the output of the loop filter. A D flipflop(17) adjusts the input data by positive and negative first clocks recovered by the voltage control oscillator(17).