发明名称 SEMICONDUCTOR WAFER AND CHARACTERISTIC EVALUATING CIRCUIT THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a characteristic evaluating circuit of a semiconductor wafer wherein no space region having a large area is provided concentrically in a single ship, and the securing of various TFB regions capable of acquiring therefrom accurate parameters and the efficient measurements of the characteristics of the wafer are made possible, and further, the increase of the number of electrode pads required for the measurements, therefore, the increase of the number of the probes of a probe card can be suppressed to a minimum. SOLUTION: Each chip formed on a wafer 1 has a space region capable of providing therein a TFB, etc., in its each corner potion region. TFBs 21, 22, 23 and 24 are provided in respective corner portions 11c, 12d, 13a and 14b abutting respectively on the intersecting regions of four chips 11, 12, 13 and 14 abutting on an intersecting region wherein X- and Y-direction scribing regions 3X, 3Y intersect each other. The TFBs 21, 22, 23 and 24 are so connected with each other by writings 5 bridging respectively the scribing regions 3X, 3Y as to form a characteristic evaluating circuit 20 of the wafer 1.
申请公布号 JP2002043528(A) 申请公布日期 2002.02.08
申请号 JP20000227686 申请日期 2000.07.27
申请人 NEC MICROSYSTEMS LTD 发明人 MOMOSE SEISHI
分类号 G01R31/28;H01L21/66;H01L21/822;H01L27/04;(IPC1-7):H01L27/04 主分类号 G01R31/28
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