发明名称 PHASE LOCK OSCILLATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a phase lock oscillation circuit that can correct an error that cannot sufficiently be corrected by a preset correction amount by a control loop on the occurrence of the error in a phase and a frequency due to an external noise or the like. SOLUTION: An offset correction circuit 16 is used to generate a correction signal on the basis of a reference clock and a PFC(Phase Frequency Comparator) 11, a phase correction control circuit 17 controls an LPF 13 to correct a phase offset and a frequency correction control circuit 18 controls a VCO 14 to correct a frequency offset so as to prevent an output signal with a phase and a frequency being different from those of an output signal substantially set from being oscillated from the VCO 14.
申请公布号 JP2002043937(A) 申请公布日期 2002.02.08
申请号 JP20000223893 申请日期 2000.07.25
申请人 NEC ENG LTD 发明人 SAKAMOTO KOICHI
分类号 H04N5/781;G11B20/14;H03L7/093;H03L7/10;H03L7/107;H04N5/95 主分类号 H04N5/781
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