| 摘要 |
PROBLEM TO BE SOLVED: To provide an oscillation stop detection circuit for an IC integration that has a small pattern area and can surely detect oscillation stop. SOLUTION: A delay circuit 2 delays a clock signal CK and outputs a delayed clock signal to an EOR (exclusive OR) 3, where the delayed clock signal is compared with the original clock signal CK. When an output signal S3 of the EOR 3 is at 'H', an NMOS 4 is conductive to discharge a capacitor 7. When the output signal S3 of the EOR 3 is at 'L', a PMOS 5 is conductive to charge a capacitor 7 according to a time constant consisting of its capacitance and a resistance of a resistor 6. While the clock signal CK exists, the output signal S3 from the EOR 3 periodically goes to 'H' or 'L' and a detection signal OUT at an output terminal 8 is kept at an 'L' level. When the clock signal CK is stopped, the output signal S3 is fixed at an 'L' level, and the capacitor 7 is charged to bring the detection signal OUT at the output terminal 8 to an 'H' level.
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