发明名称 VERIFYING METHOD OF DESIGN PARAMETER OF SEMICONDUCTOR AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To easily verify a parameter for LPE to a transistor grasping a shape when the circuit simulation of a semiconductor is carried out. SOLUTION: TCAD is carried out in a step 51 to prepare a database 52. A net list produced in a step 44 by using the database 52 is verified in a step 53. For instance, TCAD sets a parameter for TCAD so that an electric characteristic is obtained for the transistor 10. By the verification in a step 53, for instance, if drain current obtained from the transistor of the net list produced in a step 44 is matched to the result of the database 52 in a prescribed range, it is advanced to a step 45, and the circuit simulation is carried out. But if they are not matched, a parameter 46 for LPE is renewed.
申请公布号 JP2002043426(A) 申请公布日期 2002.02.08
申请号 JP20000220461 申请日期 2000.07.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKASHINO HIROYUKI
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/82 主分类号 G06F17/50
代理机构 代理人
主权项
地址