MODULE FOR GENERATING CIRCUITS FOR ANALYSING BIT STRINGS INSIDE DATA CELLS, METHOD FOR GENERATING THIS TYPE OF CIRCUIT AND RELATIVE CIRCUIT

摘要

This invention refers to a module (10) for generating integrated circuits suitable for analysing and validating bit strings inside telecommunications data cells, to the method for defining the structure and characteristics of such module and the integrated circuits that can be generated and to the integrated circuit that can be obtained with such module (10). The module (10), called parser, is parametric and makes it possible to generate parser circuits for many protocols because of such characteristic; the module (10), also, makes it possible, by means of a module REGFILE_2OUT (12), to generate programmable parser circuits and, by means of a module LOGIC_OPER (22) that can generate several analysis and validation devices, to execute in parallel bit string analysis inside telecommunications data cells.