| 摘要 |
A method of operating a semiconductor memory device capable of writing or reading in parallel a plurality of memory transistors connected to a word line in a memory cell array including a plurality of memory cells each having, alternately provided in a word line direction, an active region (channel forming region) comprised of a first conductivity type semiconductor and impurity regions comprised of a second conductivity type semiconductor shared by adjacent memory cells, for example, a VG type memory cell array, comprising driving the control gates capacitively coupled with the borders of the active regions with impurity regions and electrically isolated from the word lines to electrically divide the physical memory cell array into n number of memory cell arrays and driving the impurity regions and word lines in the same memory cell array to operate in parallel the plurality of memory cells connected to the same word line out of the cell columns.
|
