发明名称 |
Method of manufacturing a thin film transistor |
摘要 |
<p>With a conventional thin film transistor comprising a plurality of series-connected thin film transistors each having a plurality of LDD structures, leakage current can be decreased to a large effect but the area of an element can hardly be reduced. By connecting gate electrodes (15) of a plurality of thin film transistors only with an implanted region (13b) which is formed by implanting an impurity at a low concentration into a semiconductor thin film employed as an active layer, both reduction in element size and decrease in leakage current can be realized. <IMAGE></p> |
申请公布号 |
EP0871227(B1) |
申请公布日期 |
2002.02.06 |
申请号 |
EP19980106371 |
申请日期 |
1998.04.07 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
FURUTA, MAMORU |
分类号 |
G02F1/136;G02F1/1362;G02F1/1368;H01L21/336;H01L21/77;H01L21/84;H01L27/12;H01L29/49;H01L29/786;(IPC1-7):H01L29/786 |
主分类号 |
G02F1/136 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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