Continuous time delta-sigma modulator

摘要

An analog-to-digital converter (170) that employs delta-sigma technology, and has particular use in a receiver for a wireless telecommunications system. The converter (170) includes a delta-sigma modulator (172), having a summing junction (180) that receives the analog input signal to be converted. A feedback from the output of a comparator (186) is subtracted from the analog input signal to generate a difference signal that is then filtered, amplified and applied to the comparator (186) for digital conversion. A sample and hold circuit (184) receives the difference signal and holds the signal for a predetermined period of time so that the input to the comparator (186) is stable. A differential limiting amplifier (188) is employed to make the high data rate output of the comparator (186) stable. The differential limiting amplifier (188) can be within the comparator (186) itself, or in the feedback path. In one embodiment, the differential amplifier (188) employs a Schottky diode clamp (226).