发明名称 |
DEVICE FOR INITIALIZING DIGITAL SIGNAL PROCESSING CIRCUIT, TEST PATTERN, TESTING APPARATUS, MEDIUM, AND INFORMATION AGGREGATE |
摘要 |
PROBLEM TO BE SOLVED: To initialize a digital signal processing circuit, without having to perform complicated delay adjustments or special circuit measures in a device for initializing the digital signal processing circuit. SOLUTION: A reset circuit 2 generates a clock mask control signal 12, immediately prior to releasing a reset signal 11 from a reset state. It is possible for a clock creating circuit 3 to initialize the digital signal processing circuit, by halting one clock of clocks according to the clock mask control signal 12 without having to perform complicated circuit and delay adjustments. |
申请公布号 |
JP2002040103(A) |
申请公布日期 |
2002.02.06 |
申请号 |
JP20000217947 |
申请日期 |
2000.07.18 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MIZUSHIMA TETSUYA |
分类号 |
G01R31/28;G01R31/3183;G06F1/24;G06F11/22 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|