Step-down power-supply circuit

摘要

A first output circuit 2 generates output voltages in accordance with threshold voltages of diode-connected NMOS transistors 12 to 14 of a first voltage-generating circuit 4 and a second output circuit 3 generates output voltage in accordance with threshold voltages of diode-connected NMOS transistors 22 to 25 of a second voltage-generating circuit 8 so that VPC showing the value of a power-supply voltage VCC when an output from the first output circuit 2 is stopped becomes VNC showing the value of the power-supply voltage VCC when the gate of an NMOS transistor 9 is clamped at the sum of threshold voltages of the NMOS transistors 12 to 14 or less.