| 摘要 |
A vertically integrated chip on chip circuit stack provides a vertically integrated stack of die which includes two or more integrated circuit die, with the faces (circuitry) of the respective die surface up. The die are desirably of identical size, (length, and width). The die have electrical contacts at the edges of the top surface (face surface) and the bottom surface of each die is coated with an epoxy adhesive or glue where the adhesive is an electrical insulator. A spacer is between each integrated circuit die and sufficient thickness to allow write bond loops to be formed above such that the wires connected to the lower die do not touch the bottom surface of the die above. Electrically conducting wires are bonded to selected electrical contacts on each integrated circuit die. The conducting wires can be, for example, gold wires, or aluminium wires. The second end of the conducting wires are bonded to electrical conductors on a substrate which has electrical conductors. The electrical conductors on the top surface of the substrate are electrically connected to solder balls on a bottom surface of substrate. The stack and substrate can be molded in plastic, non conducting epoxy resin, other suitable molding compound or encapsulant. |
