发明名称 Method and apparatus for a logic circuit design tool
摘要 A design tool to support design of logic circuits is described. The designer develops a syntax statement that comprises encoded information to a defined syntax governing signal naming, logical function, and circuit performance. The encoded syntax statement describes the desired logical function of the logic circuit and the specific configuration of transistors required to build the logic circuit. The syntax statement is provided to a compiler that processes and decodes the syntax statement, and generates from the syntax statement a behavioral model of the logic circuit and a physical circuit description of the logic circuit.
申请公布号 US6345381(B1) 申请公布日期 2002.02.05
申请号 US19980210024 申请日期 1998.12.11
申请人 INTRINSITY, INC. 发明人 LEIGHT TIMOTHY S.;POTTER TERENCE M.;BLOMGREN JAMES S.
分类号 G06F1/08;G06F17/50;G11C11/56;H03K19/003;H03K19/096;(IPC1-7):G06F17/50 主分类号 G06F1/08
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