发明名称 |
Input/output line structure of a semiconductor memory device |
摘要 |
A semiconductor memory device including a plurality of memory blocks having associated with one or more circuit blocks therearound, and a plurality of input/output lines associated with the memory blocks, is disclosed. The input/output lines are divided into at least a first group and a second group. First portions of the input/output lines of the first group are arranged between the adjacent memory blocks while first portions of the input/output lines of the second group are arranged within the circuit blocks around the adjacent memory blocks. Second portions of the input/output lines of the first group are arranged on the circuits blocks around the memory blocks while second portions of the input/output lines of the second group are arranged between the adjacent memory blocks.
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申请公布号 |
US6345011(B2) |
申请公布日期 |
2002.02.05 |
申请号 |
US20010758526 |
申请日期 |
2001.01.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JOO JAE-HOON;KANG SANG-SEOK;CHOI JONG-HYUN;LEE YUN-SANG |
分类号 |
G11C11/409;G11C7/10;G11C11/401;H01L21/8242;H01L27/108;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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