NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

摘要

PURPOSE: A non-volatile semiconductor memory device is provided to improve resistance uniformity by using an ONO layer, an oxide layer and the second resistor pattern to protect the upper and side surfaces of the first resistor pattern in a resistor formation region, and to overcome RC delay time caused by parasitic capacitance between the first and second resistor patterns by applying the same voltage to the first and second resistor patterns through a metal layer pattern which connects the first and second resistor patterns simultaneously. CONSTITUTION: A cell array part is composed of a floating gate, an interlayer dielectric and a control gate. A peripheral circuit part includes a resistor pattern and a transistor for driving the cell array part. The resistor pattern is composed of the first and second resistor patterns(37b,47b) wherein the first resistor pattern is made of the same material as the floating gate and the second resistor pattern is made of the same material as the control gate. The upper and side surfaces of the first resistor pattern are protected by an insulation layer made of the same material as the interlayer dielectric and the second resistor pattern. The same voltage is applied to the first and second resistor pattern which are connected to each other.