| 摘要 |
PURPOSE: A via hole formation method of semiconductor devices is provided to simplify the manufacturing processes and to prevent a generation of defects in an interlayer dielectric by forming the via hole using a dry etching. CONSTITUTION: After forming a metal interconnection(102) on a semiconductor substrate(100), an interlayer dielectric(107) is then formed on the resultant structure. At this time, the interlayer dielectric(107) is composed of a first PE-TEOS(Plasma Enhanced tetraethylorthosilicate) film(104), a FOX(Flowable Oxide) layer(105) and a second PE-TEOS film(106). The second PE-TEOS film(106), the FOX layer(105) and the first PE-TEOS film(104) are sequentially dry etched by using a photoresist pattern as a mask, thereby forming a via hole(122) to expose the surface of the metal interconnection(102). The opening of the via hole is slopely etched by using an RF(Radio Frequency) etching, so that the upper diameter of the via hole(122) is relatively wider than that of the lower diameter of the via hole.
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