发明名称 SEMICONDUCTOR DEVICE OF DUAL DAMASCENE WIRE STRUCTURE AND METHOD FOR FABRICATING THE SAME
摘要 PURPOSE: A semiconductor device of a dual damascene wire structure and a method for fabricating the same are provided to open a bottom of a via contact hole and reduce the parasitic capacitance of an interlayer dielectric. CONSTITUTION: The first interlayer dielectric(104) is formed on a semiconductor substrate(100) formed with the first conductive pattern(102). An etch barrier layer is formed on an upper portion of the first interlayer dielectric(104). An etch barrier pattern(106) is formed by patterning the etch barrier layer. The second interlayer dielectric(108) is formed on the semiconductor substrate(100). The first metal trench for exposing the etch barrier pattern(106) and the second metal trench for exposing the second interlayer dielectric(108) and the first interlayer dielectric(104) by patterning the second interlayer dielectric(108). A via-contact hole for exposing the first conductive pattern(102) is formed within the metal trench by performing a lithography process and an etch process. The second conductive layer is formed thereon. The second conductive layer pattern(114') is formed by performing a planarization process.
申请公布号 KR20020009211(A) 申请公布日期 2002.02.01
申请号 KR20000042750 申请日期 2000.07.25
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, GYEONG TAE;RYU, SEONG HO
分类号 H01L21/283;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/283 主分类号 H01L21/283
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