发明名称 Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices
摘要 The novel address counter can be used in combination with an existing test unit-serving for testing digital circuits-for addressing synchronous high-frequency digital circuits, in particular fast memory devices. Address offset values are provided in programmable offset registers, with a multiplexer circuit and a selection and combination circuit, on the basis of input signals which are fed in at low frequency and in parallel by the test unit. Simple address changes and address jumps can be realized at a high clock frequency in a very flexible manner.
申请公布号 US2002012286(A1) 申请公布日期 2002.01.31
申请号 US20010907776 申请日期 2001.07.18
申请人 ERNST WOLFGANG;KRAUSE GUNNAR;KUHN JUSTUS;LUPKE JENS;MULLER JOCHEN;POCHMULLER PETER;SCHITTENHELM MICHAEL 发明人 ERNST WOLFGANG;KRAUSE GUNNAR;KUHN JUSTUS;LUPKE JENS;MULLER JOCHEN;POCHMULLER PETER;SCHITTENHELM MICHAEL
分类号 G11C29/56;(IPC1-7):G11C8/00 主分类号 G11C29/56
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